av:snes_sp_dif
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+ | **Adding an S/PDIF output to your Super NES** | ||
+ | Adding a digital audio out to the SNES isn't difficult. | ||
+ | |||
+ | To create an S/PDIF out I'm using a digital transmitter made by Cirrus Logic. | ||
+ | |||
+ | **__1. Determining your APU type__** | ||
+ | |||
+ | Before you go any further, you need to find out what kind of APU you have. | ||
+ | |||
+ | I'm assuming you already have a 4.5mm Nintendo screwdriver bit, otherwise you're going to have some difficulty getting into your SNES. Remove the six screws from the bottom, then take the top of the deck off. If you live in North America, you'll likely be presented with one of the two images: | ||
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+ | {{av: | ||
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+ | Look in the upper right corner. | ||
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+ | If you see two chips under the heatsink, then you have a revised SNES. | ||
+ | |||
+ | If you see only one chip under the heatsink, then you have the last revision of the APU. These units are rarely found in North America, but seem to be popular in Europe. | ||
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+ | |||
+ | **__2. Taking everything apart__** | ||
+ | |||
+ | __2.1 Removing the APU module__ | ||
+ | |||
+ | If you have the old style SNES, you'll need to remove the APU module in order to get to the DSP. Do this by removing the two screws in the opposite corners of the module, then pulling the module straight up to disconnect it from the main board. | ||
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+ | Next you'll need to take the lid off the underside of the module (the side with the 24-pin connector). | ||
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+ | {{av: | ||
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+ | __2.2 Getting the heatsink off__ | ||
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+ | If you have the newer style SNES, you're going to need to get the heatsink off in order to get to the DSP. If you have the older style with the APU module, removing the heatsink isn't necessary, but it could make adding the output connector easier. | ||
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+ | The heatsink is held on by three or four screws on the underside of the mainboard. | ||
+ | |||
+ | There are seven or nine screws holding the mainboard in place (four silver, three or five gold). | ||
+ | |||
+ | Before removing the mainboard from the SNES case, remove the screw holding the voltage regulator to the heatsink. | ||
+ | |||
+ | __2.3 Toss the RF module__ | ||
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+ | {{av: | ||
+ | |||
+ | When was the last time you used the RF adaptor? | ||
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+ | The shielded RF box thingy is held on by three screws, one on the top and two on the bottom. | ||
+ | |||
+ | **__3. Wiring it up__** | ||
+ | |||
+ | __3.1 Mating the two chips__ | ||
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+ | Rather than draw up a schematic, I've made a table of the pins you need to connect. | ||
+ | < | ||
+ | S-DSP S-APU CS8405A Pin | ||
+ | 33 3 +5VDC 1 COPY/C [CS bit 2] Copyright = 1 (allow copying) | ||
+ | 2 VL2+ | ||
+ | 3 EMPH [CS bits 3-5] Emphasis = 0 (no emphasis) | ||
+ | 4 SFMT0 Data input is 16-bits right justified | ||
+ | 5 SFMT1 " " | ||
+ | 6 VD+ | ||
+ | 11 TCBLD TCBL is output | ||
+ | 20 VL3+ | ||
+ | 23 VL+ | ||
+ | 24 H/S Select hardware mode for controlling channel-status (CS) bit | ||
+ | 27 VL4+ | ||
+ | |||
+ | 52 95 GND(1) 7 DGND4 | ||
+ | 8 DGND3 | ||
+ | 10 APMS Set data input to slave mode (input is controlled by ISCLK) | ||
+ | 16 CEN Select hardware mode A for setting channel status | ||
+ | 17 V [Validity bit] Sub-frame contains valid sample data | ||
+ | 18 U [User bit] Always 0 | ||
+ | 19 AUDIO(2) [CS bit 1] Non-Audio = 0 (block contains audio data) | ||
+ | 22 DGND | ||
+ | 28 ORIG [CS bits 0 & 15] Pro = 0 (consumer format), L (Category Code MSB) = 0 (original recording) | ||
+ | |||
+ | 47 16 RST 9 RST Reset | ||
+ | 43 94 32kHz 12 ILRCK Left/Right sample clock | ||
+ | 42 92 1.536MHz 13 ISCLK Sample bit clock | ||
+ | 44 93 DATA 14 SDIN Sample data input | ||
+ | 78 52 8.192MHz | ||
+ | |||
+ | Not connected 15 TCBL | ||
+ | 25 TXN | ||
+ | |||
+ | Output 26 TXP S/PDIF output | ||
+ | </ | ||
+ | < | ||
+ | |||
+ | < | ||
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+ | |||
+ | __3.2 Half a bubble is close enough__ | ||
+ | |||
+ | Using the clock signals from the DSP results in synchronous operation in the CS8405A, but the output from the DSP isn't exactly 32kHz. | ||
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+ | {{av: | ||
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+ | As you can see here, my SNES is outputting samples at about 32040Hz. | ||
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+ | The CS8405A allows for asynchronous operation. | ||
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+ | |||
+ | __3.3 Connecting the output__ | ||
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+ | You can decide on the output connector you want to use. If you're going to use a Toslink (optical) connector, the TXP pin can be used to directly drive the output circuit. | ||
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+ | If you want to use a coaxial (RCA) output, you'll need to throw in a couple of resistors to drop the voltage down to the consumer grade 0.5 volts. | ||
+ | {{av: | ||
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+ | **__4. Put it back together__** | ||
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+ | Here's the final product. | ||
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+ | {{av: | ||
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+ | Hope you remember where all those screws went. :) | ||
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+ | Copyright ©2003 Alpha-II Productions | ||
+ | |||
+ | ==== Using a CS8406 ==== | ||
+ | |||
+ | As the CS8405 is getting hard to get these days, here's a connection diagram for the CS8406. | ||
+ | |||
+ | {{av: | ||
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+ | And I thought a pic of the pins on the DSP might be useful. | ||
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+ | {{av: | ||
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+ | The clock, data, and reset pins are all in the same place. | ||
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+ | I got so frustrated trying to solder wires to the DSP inside the APU can I ended up giving up on analog audio and lifting the pins. Don't do this! This will result in a nice black screen. It's all better now. |