x68000:dmac
Differences
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x68000:dmac [2017/09/11 10:21] – added CCR register neko68k | x68000:dmac [2017/09/11 10:30] – added MTC, MAR, DAR, BTC, BAR, NIV, EIV registers neko68k | ||
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Line 23: | Line 23: | ||
|+0x07|1.b|R/ | |+0x07|1.b|R/ | ||
|+0x08|1.w| |---| | |+0x08|1.w| |---| | ||
- | |+0x0A|1.w|R/ | + | |+0x0A|1.w|R/ |
- | |+0x0C|1.l|R/ | + | |+0x0C|1.l|R/ |
|+0x10|1.l| |---| | |+0x10|1.l| |---| | ||
- | |+0x14|1.l|R/ | + | |+0x14|1.l|R/ |
|+0x18|1.w| |---| | |+0x18|1.w| |---| | ||
- | |+0x1A|1.w|R/ | + | |+0x1A|1.w|R/ |
- | |+0x1C|1.l|R/ | + | |+0x1C|1.l|R/ |
|+0x20|1.l| |---| | |+0x20|1.l| |---| | ||
|+0x24|1.b| |---| | |+0x24|1.b| |---| | ||
- | |+0x25|1.b|R/ | + | |+0x25|1.b|R/ |
|+0x26|1.b| |---| | |+0x26|1.b| |---| | ||
- | |+0x27|1.b|R/ | + | |+0x27|1.b|R/ |
|+0x28|1.b| |---| | |+0x28|1.b| |---| | ||
|+0x29|1.b|R/ | |+0x29|1.b|R/ | ||
Line 143: | Line 143: | ||
| 3 |INT - Interrupt enable \\ %0: Enable interrupt \\ %1: Disable interrupt| | | 3 |INT - Interrupt enable \\ %0: Enable interrupt \\ %1: Disable interrupt| | ||
| 2~0 |0| | | 2~0 |0| | ||
+ | |||
+ | --- | ||
+ | |||
+ | MTC< | ||
+ | Number of transfer operands. | ||
+ | |||
+ | --- | ||
+ | |||
+ | MAR< | ||
+ | Start memory transfer address. | ||
+ | |||
+ | --- | ||
+ | |||
+ | DAR< | ||
+ | Start device transfer adddress. | ||
+ | |||
+ | --- | ||
+ | |||
+ | BTC< | ||
+ | Number of transfer blocks (the number of transfer information tables) in array chain mode. | ||
+ | |||
+ | --- | ||
+ | |||
+ | BAR< | ||
+ | Start address of the transfer information table in array chain/link array chain mode. | ||
+ | |||
+ | --- | ||
+ | |||
+ | NIC< | ||
+ | Vector number to be used for interrupt generated when CSR ERR is %0. | ||
+ | |||
+ | --- | ||
+ | |||
+ | EIV< | ||
+ | Vector number to be used for the interrupt generated when CSR ERR is %1. |
x68000/dmac.txt · Last modified: 2019/08/27 20:45 by 127.0.0.1