x68000:xellent30s_-_cpu_accelerator_board
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| Both sides previous revisionPrevious revisionNext revision | Previous revisionNext revisionBoth sides next revision | ||
| x68000:xellent30s_-_cpu_accelerator_board [2014/08/28 14:23] – eidis | x68000:xellent30s_-_cpu_accelerator_board [2014/08/28 14:31] – [Xellent30s CPU accelerator board] eidis | ||
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| {{: | {{: | ||
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| + | The DIP switch settings were taken from Xellent30s manual by Tokyo Systems Research Co. Ltd. | ||
| **Hardware installation** | **Hardware installation** | ||
| Line 71: | Line 73: | ||
| < | < | ||
| - | >switch boot=scsi0 - Sets the ROM boot mode and boot ROM address | + | >switch boot=scsi0 - Sets the ROM boot mode and ROM boot address |
| >db - Starts the debugger | >db - Starts the debugger | ||
| -mes e8e00d 31 - Enables writing to SRAM | -mes e8e00d 31 - Enables writing to SRAM | ||
| Line 86: | Line 88: | ||
| </ | </ | ||
| - | The DIP switch settings were taken from Xellent30s manual by Tokyo Systems Research Co. Ltd. | ||
x68000/xellent30s_-_cpu_accelerator_board.txt · Last modified: 2019/08/27 20:45 by 127.0.0.1