av:snes_sp_dif
Differences
This shows you the differences between two versions of the page.
Next revision | Previous revision | ||
av:snes_sp_dif [2005/10/30 11:06] – created nfg | av:snes_sp_dif [2019/08/27 20:45] (current) – external edit 127.0.0.1 | ||
---|---|---|---|
Line 9: | Line 9: | ||
Before you go any further, you need to find out what kind of APU you have. | Before you go any further, you need to find out what kind of APU you have. | ||
- | I'm assuming you already have a 4.5mm Nintendo screwdriver bit, otherwise you're going to have some difficulty getting into your SNES. Remove the six screws from the bottom, then take the top of the deck off. If you live in North America, you'll likely be presented with one of the two images: | + | I'm assuming you already have a 4.5mm Nintendo screwdriver bit, otherwise you're going to have some difficulty getting into your SNES. Remove the six screws from the bottom, then take the top of the deck off. If you live in North America, you'll likely be presented with one of the two images: |
- | {{apu-module.jpg}} {{apu-onboard.jpg}} | + | |
+ | {{av:apu-module.jpg}} {{av:apu-onboard.jpg}} | ||
Look in the upper right corner. | Look in the upper right corner. | ||
Line 27: | Line 28: | ||
Next you'll need to take the lid off the underside of the module (the side with the 24-pin connector). | Next you'll need to take the lid off the underside of the module (the side with the 24-pin connector). | ||
- | {{shvc-sound.jpg}} | + | {{av:shvc-sound.jpg}} |
__2.2 Getting the heatsink off__ | __2.2 Getting the heatsink off__ | ||
Line 41: | Line 42: | ||
__2.3 Toss the RF module__ | __2.3 Toss the RF module__ | ||
- | {{rfmodule.jpg}} | + | {{av:rfmodule.jpg}} |
When was the last time you used the RF adaptor? | When was the last time you used the RF adaptor? | ||
Line 52: | Line 53: | ||
Rather than draw up a schematic, I've made a table of the pins you need to connect. | Rather than draw up a schematic, I've made a table of the pins you need to connect. | ||
- | [quote] | + | < |
- | S-DSP S-APU CS8405A Pin | + | S-DSP S-APU CS8405A |
- | 33 3 +5VDC | + | 33 3 +5VDC |
- | 2 VL2+ | + | 2 VL2+ |
- | 3 EMPH [CS bits 3-5] Emphasis = 0 (no emphasis) | + | 3 EMPH [CS bits 3-5] Emphasis = 0 (no emphasis) |
- | 4 SFMT0 Data input is 16-bits right justified | + | 4 SFMT0 Data input is 16-bits right justified |
- | 5 SFMT1 " " | + | 5 SFMT1 " " |
- | 6 VD+ | + | 6 VD+ |
- | 11 TCBLD TCBL is output | + | 11 TCBLD TCBL is output |
- | 20 VL3+ | + | 20 VL3+ |
- | 23 VL+ | + | 23 VL+ |
- | 24 H/S Select hardware mode for controlling channel-status (CS) bit | + | 24 H/S Select hardware mode for controlling channel-status (CS) bit |
- | 27 VL4+ | + | 27 VL4+ |
- | 52 95 GND<sup>1</ | + | 52 95 GND(1) 7 DGND4 |
- | 8 DGND3 | + | 8 DGND3 |
- | 10 APMS Set data input to slave mode (input is controlled by ISCLK) | + | 10 APMS Set data input to slave mode (input is controlled by ISCLK) |
- | 16 CEN Select hardware mode A for setting channel status | + | 16 CEN Select hardware mode A for setting channel status |
- | 17 V [Validity bit] Sub-frame contains valid sample data | + | 17 V [Validity bit] Sub-frame contains valid sample data |
- | 18 U [User bit] Always 0 | + | 18 U [User bit] Always 0 |
- | 19 AUDIO<sup>2</ | + | 19 AUDIO(2) [CS bit 1] Non-Audio = 0 (block contains audio data) |
- | 22 DGND | + | 22 DGND |
- | 28 ORIG [CS bits 0 & 15] Pro = 0 (consumer format), L (Category Code MSB) = 0 (original recording) | + | 28 ORIG [CS bits 0 & 15] Pro = 0 (consumer format), L (Category Code MSB) = 0 (original recording) |
- | 47 16 RST 9 RST Reset | + | 47 16 RST 9 RST Reset |
- | 43 94 32kHz | + | 43 94 32kHz |
42 92 1.536MHz 13 ISCLK Sample bit clock | 42 92 1.536MHz 13 ISCLK Sample bit clock | ||
- | 44 93 DATA 14 SDIN Sample data input | + | 44 93 DATA 14 SDIN Sample data input |
78 52 8.192MHz | 78 52 8.192MHz | ||
- | Not connected | + | Not connected |
- | 25 TXN | + | 25 TXN |
- | Output | + | Output |
- | [/quote] | + | </code> |
< | < | ||
Line 96: | Line 97: | ||
Using the clock signals from the DSP results in synchronous operation in the CS8405A, but the output from the DSP isn't exactly 32kHz. | Using the clock signals from the DSP results in synchronous operation in the CS8405A, but the output from the DSP isn't exactly 32kHz. | ||
- | {{snes-hz.jpg}} | + | {{av:snes-hz.jpg}} |
As you can see here, my SNES is outputting samples at about 32040Hz. | As you can see here, my SNES is outputting samples at about 32040Hz. | ||
Line 108: | Line 109: | ||
If you want to use a coaxial (RCA) output, you'll need to throw in a couple of resistors to drop the voltage down to the consumer grade 0.5 volts. | If you want to use a coaxial (RCA) output, you'll need to throw in a couple of resistors to drop the voltage down to the consumer grade 0.5 volts. | ||
- | {{coaxial.gif}} | + | {{av:coaxial.gif}} |
**__4. Put it back together__** | **__4. Put it back together__** | ||
Line 114: | Line 115: | ||
Here's the final product. | Here's the final product. | ||
- | {{snes-final.jpg}} | + | {{av:snes-final.jpg}} |
Hope you remember where all those screws went. :) | Hope you remember where all those screws went. :) | ||
Line 120: | Line 121: | ||
Copyright ©2003 Alpha-II Productions | Copyright ©2003 Alpha-II Productions | ||
+ | |||
+ | ==== Using a CS8406 ==== | ||
+ | |||
+ | As the CS8405 is getting hard to get these days, here's a connection diagram for the CS8406. | ||
+ | |||
+ | {{av: | ||
+ | |||
+ | And I thought a pic of the pins on the DSP might be useful. | ||
+ | |||
+ | {{av: | ||
+ | |||
+ | The clock, data, and reset pins are all in the same place. | ||
+ | |||
+ | I got so frustrated trying to solder wires to the DSP inside the APU can I ended up giving up on analog audio and lifting the pins. Don't do this! This will result in a nice black screen. It's all better now. |
av/snes_sp_dif.1130634379.txt.gz · Last modified: 2019/08/27 20:44 (external edit)