x68000:dmac
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Table of Contents
DMAC
The HD63450 has four DMA channels. On the X68000 channels #0, #1 and, #3 are assigned respectively to FD, HD, and ADPCM. Channel #2 REQ(DMA transfer request signal), ACK(response signal), and PCL (general purpose input signal) is available to the user. It can be used for transfers between memory and memory and between memory and expansion boards.
The registers for the DMAC exist starting at 0xE84000 and there are 0x40 bytes for each channel. GCR (General Control Register) is only available on channel #3.
Addresses
| Address | Channel |
|---|---|
| 0xE84000 | #0 |
| 0xE84040 | #1 |
| 0xE84080 | #2 |
| 0xE840C0 | #3 |
Register List
| Offset | Size | R/W | Description |
|---|---|---|---|
| +0x00 | 1.b | R/W | CSR - Channel Status Register |
| +0x01 | 1.b | R | CER - Channel Error Register |
| +0x02 | 1.w | — | |
| +0x04 | 1.b | R/W | DCR - Device Control Register |
| +0x05 | 1.b | R/W | OCR - Operation Control Register |
| +0x06 | 1.b | R/W | SCR - Sequence Control Register |
| +0x07 | 1.b | R/W | CCR - Channel Control Register |
| +0x08 | 1.w | — | |
| +0x0A | 1.w | R/W | MTC - Memory Transfer Control |
| +0x0C | 1.l | R/W | MAR - Memory Address Register |
| +0x10 | 1.l | — | |
| +0x14 | 1.l | R/W | DAR - Device Address Register |
| +0x18 | 1.w | — | |
| +0x1A | 1.w | R/W | BTC - Base Transfer Counter |
| +0x1C | 1.l | R/W | BAR - Base Address Register |
| +0x20 | 1.l | — | |
| +0x24 | 1.b | — | |
| +0x25 | 1.b | R/W | NIV - Normal Interrupt Vector |
| +0x26 | 1.b | — | |
| +0x27 | 1.b | R/W | EIV - Error Interrupt Vector |
| +0x28 | 1.b | — | |
| +0x29 | 1.b | R/W | MFC - Memory Function Code |
| +0x2A | 1.w | — | |
| +0x2C | 1.b | — | |
| +0x2D | 1.b | R/W | CPR - Channel Priority Register |
| +0x2E | 1.w | — | |
| +0x30 | 1.b | — | |
| +0x31 | 1.b | R/W | DFC - Device Function Code |
| +0x32 | 3.w | — | |
| +0x38 | 1.b | — | |
| +0x39 | 1.b | R/W | BFC - Base Function Code |
| +0x3A | 1.l | — | |
| +0x3E | 1.b | — | |
| +0x3F | 1.b | R/W | GCR - General Control Register |
Register Descriptions
x68000/dmac.1505074039.txt.gz · Last modified: 2019/08/27 20:44 (external edit)