Unlike most of the consoles around at the PlayStation's conception, it has a relatively sophisticated shared serial bus for the controllers. This means that almost all the signals are wired together across the both controller and memory card ports, with one connection used to indicate which device the PlayStation is trying to talk to. All this requires some processing to occur in the controller itself, so the controllers have some form of microcontroller running internally to manage this intelligence.
Looking at the plug ------------------------------- PIN 1- | o o o | o o o | o o o | \_____________________________/
|1||DATA||To PSX||This signal is an 8 bit serial transmission synchronous to the falling edge of clock (That is both the incoming and outgoing signals change on a high to low transition of clock. All the reading of signals is done on the leading edge to allow settling time.)|
|2||COMMAND||From PSX||This signal is the counterpart of DATA. It is again an 8 bit serial transmission on the falling edge of clock.|
|3||VCC2||From PSX||7 to 9V. Supplies power through fuse for memory cards/rumble motors. Drawing excess power will rupture the surface mount fuse))|
|5||VCC (3.4V)||From PSX||Main power. Supplies power through a fuse for memory cards/controllers. Drawing excess power will rupture the surface mount fuse, disconnecting the power from all controller and memory card sockets!|
|6||ATT||From PSX||ATT is used to get the attention of the controller. This signal will go low for the duration of a transmission. This pin has also been called called Select, DTR and Command.|
|7||CLK||From PSX||Clock signal to keep PSX and controller in sync with each other|
|9||ACK||To PSX||This signal should go low for at least one clock period after each 8 bits are sent and ATT is still held low. If the ACK signal does not go low within about 60 us the PSX will then start interogating other devices.|
It should also be noted that this is a bus of sorts. This means that the wires are all tied together except for the select lines which are unique for each of the two ports (though select lines are shared between the controller and memory card within each port). For the CLK, ATT, and CMD pins this does not matter as the PSX is always the originator. The DATA and ACK pins however can be driven from any one of four devices. To avoid contentions on these lines they are open collectors and can only be driven low.
All transmissions are eight bit serial LSB first. All timing in the PSX controller bus is syncronous to the falling edge of the clock. One byte of the transmissions will look kinda like this.
|BIT 0|BIT 1|BIT 2|BIT 3|BIT 4|BIT 5|BIT 6|BIT 7| CLOCK -----___---___---___---___---___---___---___---___----------- DATA -----000000111111222222333333444444555555666666777777-------- * * * * * * * * CMND -----000000111111222222333333444444555555666666777777-------- ACK ----------------------------------------------------------__-
The logic level on the data lines is changed by the transmitting device on the falling edge of clock. This is then read by the receiving device on the leading edge (at the points marked *) allowing time for the signal to settle. After each COMMAND is recieved by a selected controller, that controller needs to pull ACK low for at least one clock tick. If a selected controller does not ACK the PSX will assume that there is no controller present.
When the PSX wants to read information from a controller it pulls that devices ATT line low and issues a start command (0x01). The Controller Will then reply with its ID (0x41=Digital, 0x23=NegCon, 0x73=Analogue Red LED, 0x53=Analogue Green LED). At the same time as the controller is sending this ID byte the PSX is transmitting 0x42 to request the data. Following this the COMMAND line goes idle and the controller transmits 0x5A to say “here comes the data”. This would look like this for a digital controller
ATT -______________________________________________________________ | Byte 1 | | Byte 2 | | Byte 3 | CLOCK ---_-_-_-_-_-_-_-_-----_-_-_-_-_-_-_-_-----_-_-_-_-_-_-_-_----- 0xFF 0x41 0x5A DATA -------------------------__________--__----__--__----__--__---- 0x01 0x42 CMND -----_____________-----__--________--__------------------------ ACK --------------------__-------------------__-----------------__-
After this command initiation proccess the controller then sends all its data bytes (in the case of a digital controller there is only two). After the last byte is sent ATT will go high and the controller does not need to ACK. The data transmision for a digital controller would look like this (where A0,A1,A2…B6,B7 are the data bits in the two bytes).
ATT _______________________________________------- | Byte 4 | | Byte 5 | CLOCK ---_-_-_-_-_-_-_-_-----_-_-_-_-_-_-_-_-------- DATA ---D0D1D2D3D4D5D6D7----E0E1E2E3E4E5E6E7------- CMND ---------------------------------------------- *** ACK --------------------__------------------------ NOTE: No ACK.
Below are five tables that show the actual bytes sent by the controllers
All Buttons are active low.
|06||idle||data||Steering 0x00 = Right 0xFF = Left|
|07||idle||data||I Button 0x00 = Out 0xFF = In|
|08||idle||data||II Button 0x00 = Out 0xFF = In|
|09||idle||data||L1 Button 0x00 = Out 0xFF = In|
All Buttons are active low.
BYTE CMND DATA 01 0x01 idle 02 0x42 0x73 03 idle 0x5A Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 04 idle data SLCT JOYR JOYL STRT UP RGHT DOWN LEFT 05 idle data L2 R2 L1 R1 /\ O X |_| 06 idle data Right Joy 0x00 = Left 0xFF = Right 07 idle data Right Joy 0x00 = Up 0xFF = Down 08 idle data Left Joy 0x00 = Left 0xFF = Right 09 idle data Left Joy 0x00 = Up 0xFF = Down All Buttons active low.
BYTE CMND DATA 01 0x01 idle 02 0x42 0x53 03 idle 0x5A Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 04 idle data STRT UP RGHT DOWN LEFT 05 idle data L2 L1 |_| /\ R1 O X R2 06 idle data Right Joy 0x00 = Left 0xFF = Right 07 idle data Right Joy 0x00 = Up 0xFF = Down 08 idle data Left Joy 0x00 = Left 0xFF = Right 09 idle data Left Joy 0x00 = Up 0xFF = Down All Buttons active low.
(credit to T.Fujita http://www.keisei.tsukuba.ac.jp/~kashima/games/ps-e.txt)
BYTE CMND DATA 01 0x01 idle 02 0x42 0x12 03 idle 0x5A Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 04 idle 0xFF 05 idle data L R 06 idle data Delta Vertical 07 idle data Delta Horizontal All Buttons active low.
This page substantially based on Andrew J McCubbin's page which has since disappeared from the net.
Commands sent by the PlayStation (within the first five bytes of a packet) tell the controller how it should be configured, and what data it should respond with. Because each controller port also shares its ATT/Select line with the memory card of the same port, commands at the beginning of each packet specify which device the console is addressing. Packets beginning with 0x01 address the controllers, while packets beginning with 0x81 address memory cards. It is important that controllers not respond to or acknowledge packets which begin with 0x81, otherwise conflicts will occur with memory cards on the same port.
|COMM Byte 1|
|0x01||console is addressing controller on port with ATT line driven low|
|0x81||console is addressing memory card on port with ATT line driven low|
|COMM Byte 2|
|0x42||main polling command, used to get button/joystick data from controller|
|0x43||enter/exit config mode|
|0x44||switch between analog/digital modes and lock/unlock controller in specified mode|
|0x45||command to retrieve status/ID info from controller|
|0x46||command to retrieve 10 bytes of ID/unknown data from controller over two packets|
|0x47||command to retrieve 5 bytes of ID/unknown data from controller|
|0x4C||command to retrieve 10 bytes of ID/unknown data from controller over two packets|
|0x4D||maps rumble motor commands to command bytes 3 and 4 in 0x42 polling packet|
|COMM Byte 3|